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。关于这个话题，搜狗输入法2026提供了深入分析
When VM=1, the protected-mode bit goes low and the Entry PLA selects real-mode entry points -- MOV ES, reg takes the one-line path. Meanwhile, CPL is hardwired to 3 whenever VM=1, so the V86 task always runs at the lowest privilege level, under full paging protection. The OS can use paging to virtualize the 8086's 1 MB address space, even simulating A20 address line wraparound by mapping pages to the same physical frames.
第六十五条 有下列行为之一的，处十日以上十五日以下拘留，可以并处五千元以下罚款；情节较轻的，处五日以上十日以下拘留或者一千元以上三千元以下罚款：
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